Friday, November 14, 2008

Ultra dense non volatile memories using memristors

The memristor was first proposed by a scientist named LEON O.CHUA in 1971 as a fourth fundamental circuit element. The existence of such an element was mathematically proved and the theoretical properties were predicted using mathematical equations. But it was only in April 2008 the scientists were able to came up with a physical model to prove it.
Why the name memristor
By definition a memristor is characterized by a relation of the type g(Ψ, q)=O. It is said to be charge-controlled (flux-controlled) if this relation can be expressed as a single valued function of the charge q (flux-linkage Ψ). The voltage across a charge-controlled memristor is given by

v(t) = M(q(t)) . i(t)
where

M(q) = d Ψ(q)/dq.

Since M(q) has the unit of resistance, it will henceforth be called the incremental memristance. The value of the incremental memristance at any time to depends upon the time integral of the memristor current (voltage) from t = - ∞ to t= to. Hence, while the memristor behaves like an ordinary resistor at a given instant of time to, its resistance) depends on the complete past history of the memristor current. The memory property of the memristor arises from this fact. It is interesting to observe that once the memristor voltage v(t) or current i(t) is specified, the memristor behaves like a linear time-varying resistor.

Thus while behaving like an ordinary resistor at any given instant of time t0, its resistance depends on the complete past history of the memristor current. Thus memristor is basically a charge dependent resistor. Since memristance is a function of charge which is the time integral of current, the memristor behaves like a nonlinear resistor. The equation v(t) = M(q) . i(t) gives linear relationship only when M(q) is constant. Constant M(q) means charge does not vary with time. But a nonzero current results in instantaneously varying charge. Thus M(q) results in a nonlinear relationship. Thus memristor has meaning only in nonlinear ckt.
Device structure and fabrication


Single-crystalline TiO2 was used to elucidate how the metal/oxide interfaces control the device resistance. As shown in Fig. 1a, a single crystal of rutile TiO2 (bandgap Eg =3.0 eV) was first annealed in a 95% N2 and 5% H2 gas mixture at 550 °C for 2 h to create an oxygen-deficient layer near the surface. Oxygen vacancies in TiO2 are known to act as n-type dopants, transforming the insulating oxide into an electrically conductive doped semiconductor. Metal/semiconductor contacts are typically ohmic in the case of very heavy doping, and rectifying (Schottky-like) in the case of low doping. Two pairs of 100 µm x 100 µm Pt and Ti electrode contact pads were deposited onto the single crystal, as shown schematically in Fig. 1a: pads 1 and 4 were Pt films (80 nm thick) and pads 2 and 3 were Ti films (5 nm thick) with Pt (80 nm thick) caps. The 5-nm Ti layer was used as a chemically reactive contact to further reduce the TiO2 and create a locally high concentration of oxygen vacancies close to the metal/ semiconductor interface. These two regions showed an ohmic contact with resistance ~ 40Ω, showing that the bulk resistance of the annealed single crystal was low. In contrast, the electrical resistance between the two chemically unreactive Pt contact pads 1 and 4 was four orders of magnitude higher than the others.


Memory Storage

The bipolar switching behavior of the nanoscale metal/metal oxide/metal memristors can be used to develop resistive non volatile RAMs (Re-NVRAMs). The researches and experiments are indicating that the memristor based Re- NVRAMs will be faster than the evolving memory technologies like MRAM, PCRAM etc and 100x times faster than flash memory. Also the scientists at HP have created an ultra high density crossbar switches, which use thin film memristors to pack a record 100Gbits per cm² in a single die compared to the 16Gbits for the highest density flash memory chips extant. The memristors made by HP are very small about 15nm.

HP memristor based RRAMs will be using the crossbar architecture. Metal lines spaced less than 50-nm apart will serve as the bottom electrodes with the top electrodes patterned from metal lines arranged perpendicular to the bottom lines into a crossbar switch. In between the metal lines twin layers of titanium dioxide is sandwiched --one doped with oxygen vacancies and the other undoped. Running current between two metal lines--one on the top and one on the bottom--the device will be able to address individual bit cells, changing their resistance and thus turning bits on and off.

Ø Reading: The reading operation can be performed simply by applying a voltage lower than the threshold voltage. If the memristor is on then it will conduct even at the threshold voltage. If off it will not conduct. Thus binary data can be read.

Ø Writing: The writing operation can be performed by applying a voltage greater than the threshold voltage to write 0( or 1 depending upon the configuration) by making the memristor ON. To write a 1 (or 0) a voltage of opposite polarity whose magnitude is greater than the threshold voltage is applied which turns the memristor OFF.

Ø Addressing: Metal lines are arranged in two layers like rows and columns which are perpendicular with the other and are separated by the thin semiconductor film. Running current between the metal lines- one on the top and one on the bottom- the device will be able to access individual bit cells, changing their resistance and thus turning bits ON and OFF.

Advantages of Memristive memory

Ø For the memristor based memories there is no need of refreshing the data as in the case of today’s DRAMs. This could drastically reduce the power consumption.

Ø The inductive and capacitive effects associated with the memristors are negligible. This eliminates the delays due to charging time, storage time, discharging time.

Ø The memristive behavior and speed is inversely proportional to the square of device size. So scaling down increases the performance by great extent.

Ø The memristors can packed at a very large density than transistors. 15nm memristors are made which can hold 100Gbits/cm². Even at 4nm, a square centimeter of memristor can hold one terabit ie 10¹² bits/cm².

Ø Analog data storage is possible under controlled operation.

4 comments:

Muhammad Atif Ikram said...

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Raveendra Pai G said...

thanks Atif

Prabhat Godse said...

I came across your blog while surfing about memristors on google. I am in the process of writing a research paper on Pattern Recognition using memristors. Are you working or have plans to work on this topic (memristors)?
You can contact me
prabhat.godse@gmail.com

Anonymous said...

good